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Volumn 1313, Issue , 1997, Pages 20-39

Graphical specification and reasoning: Case study generalised railroad crossing

Author keywords

[No Author keywords available]

Indexed keywords

AUTOMATA THEORY; CALCULATIONS; COMPUTATIONAL LINGUISTICS; FORMAL METHODS; INTERACTIVE COMPUTER SYSTEMS; PROGRAMMABLE LOGIC CONTROLLERS; RAILROAD CROSSINGS; RAILROADS; SEMANTICS; VISUAL LANGUAGES;

EID: 84957368769     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/3-540-63533-5_2     Document Type: Conference Paper
Times cited : (9)

References (20)
  • 1
    • 0028413052 scopus 로고
    • A theory of timed automata
    • R. Alur and D. L. Dill. A theory of timed automata. Theoret. Comput. Sci., 126:183-235, 1994.
    • (1994) Theoret. Comput. Sci , vol.126 , pp. 183-235
    • Alur, R.1    Dill, D.L.2
  • 4
    • 84958779394 scopus 로고    scopus 로고
    • PLC-Automata: A New Class of Implementable Real-Time Automata
    • In M. Bertran and T. Rus, editors, Springer-Verlag, May
    • H. Dierks. PLC-Automata: A New Class of Implementable Real-Time Automata. In M. Bertran and T. Rus, editors, ARTS'97, volume 1231 of Lecture Notes in Computer Science, pages 111-125. Springer-Verlag, May 1997.
    • (1997) ARTS'97, Volume 1231 of Lecture Notes in Computer Science , pp. 111-125
    • Dierks, H.1
  • 5
    • 0030655947 scopus 로고    scopus 로고
    • Synthesising Controllers from ReM-Time Specifications
    • IEEE, to appear
    • H. Dierks. Synthesising Controllers from ReM-Time Specifications. In Proceedings of ISSS'97. IEEE, 1997. to appear.
    • (1997) In Proceedings of ISSS'97
    • Dierks, H.1
  • 7
    • 84957384373 scopus 로고    scopus 로고
    • Action Diagrams
    • (to appear). Elsevier Science
    • C. Dietz. Action Diagrams. In WRTP'97 (to appear). Elsevier Science, 1997.
    • (1997) WRTP'97
    • Dietz, C.1
  • 14
    • 0022020113 scopus 로고
    • A Temporal Logic for Multilevel Reasoning about Hardware
    • B. Moszkowski. A Temporal Logic for Multilevel Reasoning about Hardware. IEEE Computer, 18(2):10-19, 1985.
    • (1985) IEEE Computer , vol.18 , Issue.2 , pp. 10-19
    • Moszkowski, B.1
  • 18
    • 0003619698 scopus 로고
    • Specification and Verification of System Level Hardware Designs using Timing Diagrams
    • Paris, France
    • R. SchlSr and W. Datum. Specification and Verification of System Level Hardware Designs using Timing Diagrams. In Proc. The European Conference on Design Automation. Paris, France, 1993.
    • (1993) Proc. the European Conference on Design Automation
    • Schlsr, R.1    Datum, W.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.