Customising floating-point designs

IEEE Symposium on FPGAs for Custom Computing Machines, Proceedings

Volumn 2002-January, Issue , 2002, Pages 315-317

  Gaffar, Altaf Abdul ^a   Luk, Wayne ^a   Cheung, Peter Y K ^a   Shirazi, Nabeel ^b  

^a IMPERIAL COLLEGE LONDON   (United Kingdom)

^b XILINX INC   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER HARDWARE; COMPUTERS; COST FUNCTIONS; HARDWARE; ITERATIVE METHODS; RECONFIGURABLE HARDWARE;

DOUBLE PRECISION; DYNAMIC RANGE; FLOATING POINT NUMBERS; FLOATING POINTS; FLOATING-POINT DESIGNS; HARDWARE REDUCTION; SPEED IMPROVEMENT;

DIGITAL ARITHMETIC;

EID: 84950128418     PISSN: 10823409     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/FPGA.2002.1106698     Document Type: Conference Paper

References (8)

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