A multi-level strategy for software power estimation

Proceedings of the International Symposium on System Synthesis

Volumn 2000-January, Issue , 2000, Pages 187-192

  Brandolese, C ^a   Fornaciari, W ^a   Pomante, L ^a   Salice, F ^a   Sciuto, D ^a  

^a POLITECNICO DI MILANO   (Italy)

Author keywords

Algorithm design and analysis; Application software; Assembly; Constraint optimization; Embedded system; Energy consumption; Mathematical model; Microprocessors; Performance analysis; Software performance

Indexed keywords

ASSEMBLY; CONSTRAINED OPTIMIZATION; EMBEDDED SYSTEMS; ENERGY UTILIZATION; ESTIMATION; MATHEMATICAL MODELS; MICROPROCESSOR CHIPS; SYNTHESIS (CHEMICAL);

ALGORITHM DESIGN AND ANALYSIS; CO-DESIGN ENVIRONMENTS; CONSTRAINT OPTIMIZATIONS; LEVELS OF ABSTRACTION; MULTILEVELS; PERFORMANCE ANALYSIS; POWER ESTIMATIONS; SOFTWARE PERFORMANCE;

APPLICATION PROGRAMS;

EID: 84949966460     PISSN: 10801820     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISSS.2000.874048     Document Type: Conference Paper

References (7)

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