A low-power matrix transposer using MSB-controlled inversion coding

AP-ASIC 1999 - 1st IEEE Asia Pacific Conference on ASICs

Volumn , Issue , 1999, Pages 194-197

  Kim, Kyeounsoo ^a   Beerel, P A ^a  

^a UNIVERSITY OF SOUTHERN CALIFORNIA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

EID: 84949795514     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/APASIC.1999.824061     Document Type: Conference Paper

References (10)

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9. Y. Shin, S. I. Chae, K. Choi, "Partial Bus-Invert Coding for Power Optimization of System Level Bus, " in Proceeding of International Symposium on Low Power Electronics Design, pp. 127-129, 1998.
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