Scalability problems of digital circuit evolution evolvability and efficient designs

Proceedings - NASA/DoD Conference on Evolvable Hardware, EH

Volumn 2000-January, Issue , 2000, Pages 55-64

  Vassilev, Vesselin K ^a   Miller, Julian F ^b  

^a EDINBURGH NAPIER UNIVERSITY   (United Kingdom)

^b UNIVERSITY OF BIRMINGHAM   (United Kingdom)

Author keywords

[No Author keywords available]

Indexed keywords

COMBINATORIAL CIRCUITS; DESIGN; DIGITAL CIRCUITS; HARDWARE; INTEGRATED CIRCUITS; NASA;

BASIC BUILDING BLOCK; BUILDING BLOCKES; EFFICIENT DESIGNS; EVOLUTIONARY DESIGN; FITNESS LANDSCAPE; MULTIPLIER CIRCUITS; NUMBER OF GATES; SCALABILITY PROBLEMS;

ELECTRIC NETWORK ANALYSIS;

EID: 84949794711     PISSN: 15506029     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/EH.2000.869342     Document Type: Conference Paper

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