Hardware-software codesign and parallel implementation of a Golomb ruler derivation engine

IEEE Symposium on FPGAs for Custom Computing Machines, Proceedings

Volumn 2000-January, Issue , 2000, Pages 227-235

  Sotiriades, Euripides ^a   Dollas, Apostolos ^a   Athanas, Peter ^b  

^a TECHNICAL UNIVERSITY OF CRETE   (Greece)

^b State University   (United States)

Author keywords

Architecture; Custom; FPGA; Golomb ruler

Indexed keywords

ARCHITECTURE; COMPUTER HARDWARE; COMPUTERS; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); HARDWARE; INTEGRATED CIRCUIT DESIGN; PARALLEL ARCHITECTURES; PERSONAL COMPUTERS;

CUSTOM; DESIGN IMPROVEMENTS; FPGA IMPLEMENTATIONS; GOLOMB RULER; PARALLEL EXECUTIONS; PARALLEL IMPLEMENTATIONS; PARALLEL PROCESSING; VIRGINIA TECH;

HARDWARE-SOFTWARE CODESIGN;

EID: 84949783431     PISSN: 10823409     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/FPGA.2000.903410     Document Type: Conference Paper

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