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Volumn 2000-January, Issue , 2000, Pages 59-67

A reconfigurable computing architecture for microsensors

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTERS; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); GENERAL PURPOSE COMPUTERS; MICROSENSORS; RECONFIGURABLE ARCHITECTURES; SIGNAL PROCESSING;

EID: 84949748433     PISSN: 10823409     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/FPGA.2000.903393     Document Type: Conference Paper
Times cited : (12)

References (5)
  • 2
    • 84949817229 scopus 로고    scopus 로고
    • Focus report: Programmable logic
    • Oct.
    • Tets Maniwa, "Focus Report: Programmable Logic", in Integrated System Design, Oct. 1999, pp. 42-50.
    • (1999) Integrated System Design , pp. 42-50
    • Maniwa, T.1
  • 3
    • 0029205223 scopus 로고
    • Overview of the power minimization techniques employed in the IBM PowerPC 4xx embedded processors
    • Apr.
    • A. Correale Jr., "Overview of the power minimization techniques employed in the IBM PowerPC 4xx embedded processors", in Proc. Int. Symp. Low Power Design, Apr. 1995, pp. 75-80.
    • (1995) Proc. Int. Symp. Low Power Design , pp. 75-80
    • Correale, A.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.