An experimental procedure to derive reliable IBIS models

Proceedings of the Electronic Packaging Technology Conference, EPTC

Volumn 2000-January, Issue , 2000, Pages 339-344

  Zak, T ^a   Ducrot, M ^a   Xavier, C ^a   Drissi, M ^b  

^a THALES   (France)

^b INSA DE RENNES   (France)

Author keywords

Bidirectional control; Circuit simulation; Clamps; Diodes; Electromagnetic compatibility; Integrated circuit measurements; Packaging; Power measurement; Power supplies; Voltage

Indexed keywords

CIRCUIT SIMULATION; CLAMPING DEVICES; DIODES; ELECTRIC POTENTIAL; ELECTRIC POWER MEASUREMENT; ELECTRONICS PACKAGING; PACKAGING; PRINTED CIRCUIT BOARDS; PRINTED CIRCUITS;

BUFFER INFORMATION; EXPERIMENTAL PROCEDURE; INTEGRATED CIRCUIT MEASUREMENTS; ITS APPLICATIONS; MEASUREMENT DEVICE; POWER SUPPLY; RESEARCH AND DEVELOPMENT; SIMULATED RESULTS;

ELECTROMAGNETIC COMPATIBILITY;

EID: 84949557610     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/EPTC.2000.906397     Document Type: Conference Paper

References (6)

1. "IBIS (I/O Buffer Information Specification)", The IBIS Open Forum, Version 3.2, August 1999.
2. Cuny R., "SPICE and IBIS Modeling Kits, The Basis for Signal Integrity Analyses", IEEE symposium, Santa Clara, 1996.
3. Peters S., "IBIS Forum I/O Buffer Modeling Cookbook", The IBIS Open Forum, Revision 2.0X, September 1997.
4. Dasher D. J., "Measuring Parasitic Capacitance and Inductance using TDR", HP Journal, April 1996.
5. Lin F., Iyer M. K., Ma H., Tan K. S., "Accurate Package Modeling Based on S-Parameter Measurements", Institute of Microelectronics, Singapore.
6. "Measurement of Package Inductance and Capacitance Matrices", IEEE Trans-CPMT-B, Vol 19, No 1, February 1996.