FPGA implementation of a sigma-delta (Σ-Δ) architecture based digital i-f stage for software radio

Proceedings of the Annual IEEE International ASIC Conference and Exhibit

Volumn 2002-January, Issue , 2002, Pages 341-345

  Abeysekera, Saman S ^a   Charoensak, Charayaphan ^a  

^a NANYANG TECHNOLOGICAL UNIVERSITY   (Singapore)

Author keywords

[No Author keywords available]

Indexed keywords

DIGITAL RADIO; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); HARDWARE; INTEGRATED CIRCUIT DESIGN; MODULATORS; QUANTIZATION (SIGNAL); SIGNAL RECEIVERS; SOFTWARE RADIO;

FPGA IMPLEMENTATIONS; HARDWARE IMPLEMENTATIONS; HARDWARE REALIZATION; MODULATOR ARCHITECTURE; OVER SAMPLING RATIO; SAMPLING FREQUENCIES; SOFTWARE RADIO TECHNOLOGY; SYSTEM-LEVEL APPROACH;

APPLICATION SPECIFIC INTEGRATED CIRCUITS;

EID: 84949428440     PISSN: 10630988     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ASIC.2002.1158082     Document Type: Conference Paper

References (12)

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