X-Gen: A random test-case generator for systems and SoCs

Proceedings - IEEE International High-Level Design Validation and Test Workshop, HLDVT

Volumn , Issue , 2002, Pages 145-150

  Emek, R ^a   Jaeger, I ^a   Naveh, Y ^a   Bergman, G ^a   Aloni, G ^a   Katz, Y ^a   Farkash, M ^a   Dozoretz, I ^a   Goldin, A ^a  

^a IBM   (Israel)

Author keywords

Assembly systems; Concrete; Engines; Graphical user interfaces; Hardware; Heart; Laboratories; Registers; System testing; System on a chip

Indexed keywords

APPLICATION SPECIFIC INTEGRATED CIRCUITS; COMPUTATIONAL LINGUISTICS; COMPUTER HARDWARE; CONCRETE TESTING; CONCRETES; ENGINES; GRAPHICAL USER INTERFACES; HEART; LABORATORIES; MICROPROCESSOR CHIPS; MODEL CHECKING; MULTIPROCESSING SYSTEMS; PROGRAMMABLE LOGIC CONTROLLERS; STRUCTURAL DESIGN; TESTING; USER INTERFACES;

ADDRESS TRANSLATION; ASSEMBLY SYSTEMS; MULTIPROCESSOR SERVERS; REGISTERS; SYSTEM ON A CHIP; SYSTEM TESTING; SYSTEM-LEVEL TEST; SYSTEMS-ON-A CHIPS;

SYSTEM-ON-CHIP;

EID: 84949232934     PISSN: 15526674     EISSN: None     Source Type: Journal    
DOI: 10.1109/HLDVT.2002.1224444     Document Type: Article

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