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Volumn 2002-January, Issue , 2002, Pages 60-68

A preliminary study on data allocation of on-chip dual memory banks

Author keywords

Application software; Assembly; Digital signal processing; Finite impulse response filter; Memory architecture; Registers; Space technology; System on a chip; Time to market; Upper bound

Indexed keywords

APPLICATION PROGRAMS; APPLICATION SPECIFIC INTEGRATED CIRCUITS; ASSEMBLY; CODES (SYMBOLS); COMMERCE; COMPUTER ARCHITECTURE; COMPUTER HARDWARE; COMPUTER SOFTWARE; CONCURRENT ENGINEERING; DIGITAL SIGNAL PROCESSING; FIR FILTERS; HARDWARE; IMPULSE RESPONSE; PROGRAM COMPILERS; SIGNAL PROCESSING; SOFTWARE DESIGN; SYSTEM-ON-CHIP;

EID: 84948451794     PISSN: 15506207     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/INTERA.2002.995844     Document Type: Conference Paper
Times cited : (1)

References (11)
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    • Simultaneous Reference Allocation in Code Generation for Dual Data Memory Bank ASIPs
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    • A. Sudarsanam and S. Malik. Simultaneous Reference Allocation in Code Generation for Dual Data Memory Bank ASIPs. ACM Transactions on Design Automation of Electronic Systems, 5(2):242-264, April 2000.
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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.