A parallel FFT architecture for FPGAs

Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

Volumn 3203, Issue , 2004, Pages 948-953

  Palmer, Joseph ^a   Nelson, Brent ^a  

^a BRIGHAM YOUNG UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

EID: 84947909299     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/978-3-540-30117-2_105     Document Type: Conference Paper

References (6)

1. Ananth Gramam, Anshul Gupta, George Karypis, and Vipin Kumar, Introduction to Parallel Computing, Second Edition, Pearson Education, Harlow, England, 2003.
2. Winthrop W. Smith and Joanne M. Smith, Handbook of Real-Time Fast Fourier Transforms, IEEE, New York, 1995.
3. S. He and M. Torkelson, “A NewApproach to Pipeline FFT Processor”, The 10th International Parallel Processing Symposium(IPPS), pp. 766-770,1996.
4. Tom Chen, Glen Sunada, and Jian Jin. COBRA: A 100-MOPS single-chip programmable and expandable FFT. IEEE Transactions on VLSI Systems, 7(2), Jun 1999.
5. Yu Tai Ma. AVLSI-Oriented Parallel FFTAlgorithm. IEEE Transactions on Signal Processing, 44(2), Feb 1996.
6. E. Bidet, D. Castelain, C. Joanblanq and P. Senn, “A Fast Single-Chip Implementation of 8192 Complex Point FFT”, IEEE Journal of Solid-State Circuits, vol. 30, March 1995.