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Volumn , Issue , 2003, Pages

Evolutionary fault recovery in a Virtex FPGA using a representation that incorporates routing

Author keywords

[No Author keywords available]

Indexed keywords

DISTRIBUTED PARAMETER NETWORKS; LOGIC CIRCUITS;

EID: 84947217176     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IPDPS.2003.1213316     Document Type: Conference Paper
Times cited : (14)

References (16)
  • 1
  • 2
    • 84947295789 scopus 로고    scopus 로고
    • Agilent Technologies, Inc.Quadrature Decoder/Counter Interface ICs, Data Sheet HCTL-2020PLC
    • Agilent Technologies, Inc., Quadrature Decoder/Counter Interface ICs, Data Sheet HCTL-2020PLC.
  • 15
    • 0035161647 scopus 로고    scopus 로고
    • On the use of distributed reconfigurable hardware in launch control avionics
    • TBD day/month, TBD location
    • E. B. Wells and S. M. Loo, "On the Use of Distributed Reconfigurable Hardware in Launch Control Avionics, " in Proceedings of Digital Avionics Systems Conference, TBD day/month, 2001, TBD location.
    • (2001) Proceedings of Digital Avionics Systems Conference
    • Wells, E.B.1    Loo, S.M.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.