High K LAON for gate dielectric application

2003 IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC 2003

Volumn , Issue , 2003, Pages 357-360

  Zhou, Hongwei ^a   Wang, Xiaoping ^a   Nguyen, Bich Yen ^a   Rai, Raghaw ^a   Prabhu, Lata ^a   Jiang, Jack ^a   Kaushik, Vidya ^a   Scheaffer, Jamie ^a   Zavala, Melissa ^a   Duda, Erika ^a   Liu, Ran ^a   Zonner, Stefan ^a   Hradsky, Bruce ^a   Fejes, Peter ^a   Theodore, David ^a   Edwards, Ginger ^a   Gregory, Rich ^a   Wang, Richard ^a   Yam, Hak ^a   Yu, Jimmy ^d   Lu, Huibin ^b   Chen, Zhenghao ^b   Lu, Xubing ^c   Liu, Zhiguo ^c   more..

^a MOTOROLA INC   (United States)

^b CHANGCHUN INSTITUTE OF OPTICS   (China)

^c NANJING UNIVERSITY   (China)

^d NONE

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; ELECTRON DEVICES; ELECTRONIC PROPERTIES; GATE DIELECTRICS;

ALUMINUM OXYNITRIDE; CMOS PROCESSS; GATE DIELECTRIC APPLICATIONS; HIGH- K; HIGH-K MATERIALS;

SOLID STATE DEVICES;

EID: 84946400012     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/EDSSC.2003.1283549     Document Type: Conference Paper

References (4)

1. B.H.Lee et al., IEDM Tech. Dig., p.133, 1999
2. Laegu Kang, et al., Symposium on VLSI Technology Digest of Technical Papers, p.44, 2000
3. R.Choi et al. Symp. VLSI Tech, 2001, p15
4. G.D. Wilk et al., J. Appl. Phys. Vol 89, p. 5243, 2001