Improving simulated annealing placement by applying random and greedy mixed perturbations [IC layout]

Proceedings - 16th Symposium on Integrated Circuits and Systems Design, SBCCI 2003

Volumn , Issue , 2003, Pages 267-272

  Hentschke, R F ^a   Reis, R A D L ^a  

^a FEDERAL UNIVERSITY OF RIO GRANDE DO SUL   (Brazil)

Author keywords

Adaptive scheduling; Costs; Length measurement; Routing; Simulated annealing; Space exploration; Space technology; Temperature; Timing; Wire

Indexed keywords

COSTS; INTEGRATED CIRCUITS; RANDOM PROCESSES; SIMULATED ANNEALING; SPACE RESEARCH; SYSTEMS ANALYSIS; TEMPERATURE; WIRE;

ADAPTIVE SCHEDULING; LENGTH MEASUREMENT; ROUTING; SPACE EXPLORATIONS; SPACE TECHNOLOGIES; TIMING;

INTEGRATED CIRCUIT LAYOUT;

EID: 84945416973     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/SBCCI.2003.1232840     Document Type: Conference Paper

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