Test circuits for fast and reliable assessment of CDM robustness of I/O stages

Electrical Overstress/Electrostatic Discharge Symposium Proceedings

Volumn 2003-January, Issue , 2003, Pages

  Stadler, W ^a   Esmark, K ^a   Reynders, K ^b   Zubeidat, M ^b   Graf, M ^c   Wilkening, W ^d   Willemen, J ^d   Qu, N ^d   Mettler, S ^d   Etherton, M ^d   Nuernbergk, D ^e   Wolf, H ^f   Gieser, H ^f   Soppa, W ^g   De Heyn, V ^h   Natarajan, M ^h   Groeseneken, G ^h   Morena, E ⁱ   Stella, R ⁱ   Andreini, A ⁱ   Litzenberger, M ^j   Pogany, D ^j   Gornik, E ^j   Foss, C ^k   Konrad, A ^k   Frank, M ^k   more..

^a INFINEON TECHNOLOGIES AG   (Germany)

^b AMIS   (Belgium)

^c Atmel Germany GmbH   (Germany)

^d ROBERT BOSCH GMBH   (Germany)

^e IMMS GGmbH   (Germany)

^f Fraunhofer Institute Reliability and Microintegration   (Germany)

^g UNIVERSITY OF APPLIED SCIENCES OSNABRÜCK   (Germany)

^h IMEC   (Belgium)

ⁱ STMICROELECTRONICS   (Italy)

^j VIENNA UNIVERSITY OF TECHNOLOGY   (Austria)

^k X FAB Semiconductor Foundries AG   (Germany)

more..

Author keywords

[No Author keywords available]

Indexed keywords

LASER INTERFEROMETRY; TESTING;

DEVICE SIMULATIONS; PHYSICAL FAILURE ANALYSIS; RELIABLE ASSESSMENT; SENSITIVE CIRCUITS; STRESS TEST; TEST CIRCUIT; TEST STRUCTURE;

FAILURE ANALYSIS;

EID: 84945206068     PISSN: 07395159     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (6)

1. A. Amerasekera, C. Duvvury, ESD in Silicon Integrated Circuits, 2'" Edition, John Wiley, Chichester, 2002.
2. H. Gieser, P. Egger, "Influence of Tester Parasitics on 'Charged Device Model'-Failure Thresholds", Proc. 16th EOS/ESD Symp. (1994), 69.
3. H. Gieser, M. Haunschild, "Very-Fast Transmission Line Pulsing of Integrated Structures and the Charged Device Model", Proc. 18th EOS/ESD Symposium (1996), 85.
4. 5. Bychikhin, V. Dubec, M. Litzenberger, D. Pogany, E. Gomik, G. Groos, K. Esmark, M. Ste.cher, W. Stadler, H. Gieser, H. Wolf, "Investigation of ESD protection elements under high current stress in CDM-like time domain using backside laser interferometry", Proc. 24th EOS/ESD Symposium (2002), 387.
5. I. Doerr, H.A. Gieser, G. Sommer, H. Wolf, W. Wilkening, J. Willemen, A. Andreini, F. Salhi, G. Fotheringham, "Electrical Characterisation of a PSO-Package in the Context of Electrostatic Discharge", submitted to EMC, Istanbul (2003).
6. J. Willemen, A. Andreini, V. Dc Heyn, K. Esmark, M. Etherton, H. Gieser, G. Groeseneken, S. Mettler, E. Morena, N. Qu, W. Soppa, W. Stadler, R. Stella, W. Wilkening, H. Wolf, Zullino L., "Characterization and Modeling of Transient Device Behavior under CDM ESD Stress", 25th EOS/ESD Symp. (2003).