Piparazzi: A test program generator for micro-architecture flow verification

Proceedings - IEEE International High-Level Design Validation and Test Workshop, HLDVT

Volumn 2003-January, Issue , 2003, Pages 23-28

  Adir, A ^a   Bin, E ^a   Peled, O ^a   Ziv, A ^a  

^a IBM HAIFA RESEARCH LAB   (Israel)

Author keywords

Automatic programming; Computer bugs; Concrete; Cost function; Engines; Investments; Microprocessors; Modems; Random number generation; Testing

Indexed keywords

AUTOMATIC PROGRAMMING; COMPUTER ARCHITECTURE; COMPUTER PROGRAMMING; CONCRETE TESTING; CONCRETES; CONSTRAINT SATISFACTION PROBLEMS; COST FUNCTIONS; ENGINES; INVESTMENTS; MICROPROCESSOR CHIPS; MODEMS; RANDOM NUMBER GENERATION; TEST FACILITIES; TESTING;

ARCHITECTURAL MODELING; COMPUTER BUGS; DECLARATIVE MODELS; MICRO ARCHITECTURES; MODERN MICROPROCESSOR; PERFORMANCE BUGS; TEST PROGRAM;

SOFTWARE TESTING;

EID: 84944320338     PISSN: 15526674     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/HLDVT.2003.1252470     Document Type: Conference Paper

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