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Volumn 2003-January, Issue , 2003, Pages 45-50
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Hardware-software codesign of a 14.4 MBit - 64 state - Viterbi decoder for an application-specific digital signal processor
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Author keywords
Application specific integrated circuits; Computer aided instruction; Computer architecture; Concurrent computing; Decoding; Digital signal processing; Digital signal processors; Digital video broadcasting; Signal processing algorithms; Viterbi algorithm
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Indexed keywords
ALGORITHMS;
APPLICATION PROGRAMS;
APPLICATION SPECIFIC INTEGRATED CIRCUITS;
COMPUTER AIDED INSTRUCTION;
COMPUTER ARCHITECTURE;
COMPUTER GRAPHICS;
CONVOLUTIONAL CODES;
DECODING;
DIGITAL INTEGRATED CIRCUITS;
DIGITAL SIGNAL PROCESSING;
DIGITAL SIGNAL PROCESSORS;
DIGITAL VIDEO BROADCASTING (DVB);
FAST FOURIER TRANSFORMS;
HARDWARE-SOFTWARE CODESIGN;
INTEGRATED CIRCUIT DESIGN;
INTEGRATED CIRCUITS;
MULTIMEDIA SYSTEMS;
PARALLEL PROCESSING SYSTEMS;
RADIO BROADCASTING;
SIGNAL ENCODING;
SIGNAL RECEIVERS;
VIDEO SIGNAL PROCESSING;
VITERBI ALGORITHM;
ADD-COMPARE-SELECT;
APPLICATION SPECIFIC;
COMPUTATIONAL POWER;
CONCURRENT COMPUTING;
PARALLEL COMPUTATION;
RECEIVER ALGORITHMS;
SIGNAL PROCESSING ALGORITHMS;
WIRELESS RADIO SYSTEMS;
SIGNAL PROCESSING;
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EID: 84943254737
PISSN: 15206130
EISSN: None
Source Type: Conference Proceeding
DOI: 10.1109/SIPS.2003.1235642 Document Type: Conference Paper |
Times cited : (17)
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References (6)
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