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Volumn 2003-January, Issue , 2003, Pages 134-140

Design and prototyping a Fast Hadamard Transformer for WCDMA

Author keywords

Clocks; Computer science; Counting circuits; Discrete Fourier transforms; Error correction; Error correction codes; Multiaccess communication; Prototypes; Shift registers; Signal processing

Indexed keywords

CLOCKS; CODE DIVISION MULTIPLE ACCESS; COMPUTER SCIENCE; COUNTING CIRCUITS; DISCRETE FOURIER TRANSFORMS; ERROR CORRECTION; INTEGRATED CIRCUIT DESIGN; MOBILE TELECOMMUNICATION SYSTEMS; SHIFT REGISTERS; SIGNAL PROCESSING;

EID: 84941283243     PISSN: 10746005     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IWRSP.2003.1207040     Document Type: Conference Paper
Times cited : (12)

References (10)
  • 3
    • 0032672345 scopus 로고    scopus 로고
    • High throughput VLSI implementation of discrete orthogonal transforms using bit-level vector-matrix multiplier
    • May
    • S.S. Nayak and P.K. Meher, "High throughput VLSI implementation of discrete orthogonal transforms using bit-level vector-matrix multiplier", IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing, Volume 46, Issue 5, May 1999, pp. 655-658.
    • (1999) IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing , vol.46 , Issue.5 , pp. 655-658
    • Nayak, S.S.1    Meher, P.K.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.