4.6 A1.93TOPS/W scalable deep learning/inference processor with tetra-parallel MIMD architecture for big-data applications

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn 58, Issue , 2015, Pages 80-81

  Park, Seongwook ^a   Bong, Kyeongryeol ^a   Shin, Dongjoo ^a   Lee, Jinmook ^a   Choi, Sungpill ^a   Yoo, Hoi Jun ^a  

^a Korea Advanced Institute of Science and Technology (KAIST)   (South Korea)

Author keywords

[No Author keywords available]

Indexed keywords

BIG DATA; CHARACTER RECOGNITION; DATA HANDLING; ENERGY EFFICIENCY; LEARNING SYSTEMS; MOTION ESTIMATION; PARALLEL ARCHITECTURES; PORTABLE EQUIPMENT;

BIG DATA APPLICATIONS; COMPUTATIONAL CAPABILITY; ENERGY EFFICIENT; MIMD ARCHITECTURE; MOTION RECOGNITION; REALTIME PROCESSING; RECOGNITION ACCURACY; RESTRICTED BOLTZMANN MACHINE;

DEEP LEARNING;

EID: 84940782827     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISSCC.2015.7062935     Document Type: Conference Paper

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