1T1MTJ STT-MRAM Cell Array Design with an Adaptive Reference Voltage Generator for Improving Device Variation Tolerance

2015 IEEE 7th International Memory Workshop, IMW 2015

Volumn , Issue , 2015, Pages

  Koike, Hiroki ^a,b   Miura, Sadahiko ^a   Honjo, Hiroaki ^a   Watanabe, Tosinari ^a,b   Sato, Hideo ^a   Sato, Soshi ^a   Nasuno, Takashi ^a,b   Noguchi, Yasuo ^a,b   Yasuhira, Mitsuo ^a   Tanigawa, Takaho ^a,b   Muraguchi, Masakazu ^a,b   Niwa, Masaaki ^a   Ito, Kenchi ^a   Ikeda, Shoji ^a,b   Ohno, Hideo ^a   Endoh, Tetsuo ^a,b  

^a TOHOKU UNIVERSITY   (Japan)

^b JAPAN SCIENCE AND TECHNOLOGY AGENCY   (Japan)

Author keywords

array; Monte Carlo simulation; reference; sense amplifier; STT MRAM

Indexed keywords

MAGNETIC RECORDING; MAGNETIC STORAGE; MEMORY ARCHITECTURE; MONTE CARLO METHODS; RANDOM ACCESS STORAGE; SPICE;

ARRAY; MAGNETIC RANDOM ACCESS MEMORY; REFERENCE; REFERENCE VOLTAGE GENERATOR; SENSE AMPLIFIER; SPICE CIRCUIT SIMULATION; SPIN TRANSFER TORQUE; STT-MRAM;

MRAM DEVICES;

EID: 84939526411     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IMW.2015.7150264     Document Type: Conference Paper

References (6)

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6. H. Koike et al., Annual Conf. on MMM, Nov. 2013, p. 324.