Experiments with sequential prefetching

Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

Volumn 2110, Issue , 2001, Pages 322-331

  Manoharan, Sathiamoorthy ^a   Yavasani, Chaitanya Reddy ^a  

^a UNIVERSITY OF AUCKLAND   (New Zealand)

Author keywords

[No Author keywords available]

Indexed keywords

ARTIFICIAL INTELLIGENCE; COMPUTER SCIENCE; COMPUTERS;

MEMORY LATENCIES; PREFETCHES; PREFETCHING;

CACHE MEMORY;

EID: 84937110882     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/3-540-48228-8_33     Document Type: Conference Paper

References (5)

1. Fredrik Dahlgren, Michel Dubois, and Per Stenstrom. Sequential hardware prefetching in shared-memory multiprocessors. IEEE Transactions on Parallel and Distributed Systems, 6(7):733-746, July 1995.
2. Nathalie Drach. Hardware implementation issues of data prefetching. In Proceedings of the International Conference on Supercomputing, pages 245-254, ACM Press, 1995.
3. th International Conference on Supercomputing, pages 364-373, IEEE Press, 1990.
4. A J Smith. Cache memories. ACM Computing Surveys, 1992.
5. Steven VanderWiel and David Lilja. When caches aren’t enough: Data prefetching techniques. Computer, pages 23-30, July 1997.