When caches aren't enough: Data prefetching techniques

Computer

Volumn 30, Issue 7, 1997, Pages 23-30

  VanderWiel, Steven P ^a,b,c   Lilja, David J ^a,b,c,d,e  

^a UNIVERSITY OF MINNESOTA   (United States)

^b IOWA STATE UNIVERSITY   (United States)

^c IEEE   (United States)

^d UNIVERSITY OF ILLINOIS AT URBANA CHAMPAIGN   (United States)

^e ACM   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

DATA PREFETCHING; STATIC RAM MEMORY;

BUFFER STORAGE; CABLE SHEATHING; COMPUTER ARCHITECTURE;

RANDOM ACCESS STORAGE;

EID: 0031190399     PISSN: 00189162     EISSN: None     Source Type: Trade Journal    
DOI: 10.1109/2.596622     Document Type: Article

References (10)

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2. T.F. Chen and J.-L. Baer, "A Performance Study of Software and Hardware Data Prefetching Schemes," Proc. 21st Int'l Symp. Computer Architecture, IEEE CS Press, Los Alamitos, Calif., 1994, pp. 223-232.
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8. A.J. Smith, "Cache Memories," Computing Surveys, Sept. 1982, pp. 473-530.
9. F. Dahlgren, M. Dubois, and P. Stenström, "Fixed and Adaptive Sequential Prefetching in Shared-memory Multiprocessors," Proc. 1993 Int'l Conf. Parallel Processing, CRC Press, Boca Raton, Fla., 1993, pp. 156-163.
10. T.F. Chen and J.-L. Baer, "Effective Hardware-Based Data Prefetching for High Performance Processors," IEEE Trans. Computers, May 1995, pp. 609-623.