Low-complexity BCJR decoder for turbo decoders and its VLSI implementation in 0.18-/spl mu/m CMOS

IEEE Vehicular Technology Conference

Volumn 2, Issue , 2005, Pages 912-916

  Sabeti, L ^a   Ahmadi, M ^a   Tepe, K E ^a  

^a UNIVERSITY OF WINDSOR   (Canada)

Author keywords

implementation; Max Log MAP algorithm; Turbo coding

Indexed keywords

CMOS INTEGRATED CIRCUITS; INTEGRATED CIRCUIT DESIGN; TURBO CODES; VLSI CIRCUITS;

DECODER ARCHITECTURE; IMPLEMENTATION; MAX-LOG-MAP ALGORITHM; MAXIMUM A POSTERIORI DECODERS; PARALLEL AND PIPELINE; TRANSMISSION SYSTEMS; TURBO CODING; VLSI IMPLEMENTATION;

DECODING;

EID: 84931372714     PISSN: 15502252     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/VETECF.2005.1558058     Document Type: Conference Paper

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