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Volumn 2, Issue , 2001, Pages 946-951
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Implementation of a low complexity, low power, integer-based Turbo decoder
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Author keywords
[No Author keywords available]
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Indexed keywords
ALGORITHMS;
BIT ERROR RATE;
COMMUNICATION CHANNELS (INFORMATION THEORY);
DIGITAL ARITHMETIC;
FIELD PROGRAMMABLE GATE ARRAYS;
THROUGHPUT;
TURBO CODES;
TURBO DECODERS;
DECODING;
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EID: 0035684876
PISSN: None
EISSN: None
Source Type: Conference Proceeding
DOI: None Document Type: Conference Paper |
Times cited : (21)
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References (17)
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