MOSFET matching in a deep submicron technology

European Solid-State Device Research Conference

Volumn , Issue , 1996, Pages 731-734

  Buisson, Olivier Roux Dit ^a   Morin, Gérard ^a  

^a STMICROELECTRONICS   (Italy)

Author keywords

[No Author keywords available]

Indexed keywords

DEEP SUB-MICRON TECHNOLOGY; MOS-FET;

EID: 84920741123     PISSN: 19308876     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (7)

1. K.R. Lakshmikumar et al, "Characterization ad Modeling of Matching in MOS Transistors for Precision Analog Design", IEEE J. Sol. St. Circ., vol. SC-21, NO. 6, Dec. 1986, pp. 1057-1066.
2. A. Pergoot et al, "Statistics for Matching", Proc. IEEE Int. Conf. on Microelectronic Test Structures, Vol. 8, Mar. 1995, pp.193-197.
3. T. Mizuno et al, "Experimental Study of Threshold Voltage Fluctuation Due to Statistical Variation of Channel Dopant Number in MOSFET's", IEEE Trans, on Electron Devices, vol 41, NO. 11, Nov. 1994, pp.2216-2221.
4. M.J.M. Pelgrom et al, "Matching properties of MOS Transistors", IEEE J. Sol. St. Circ, vol. 24, NO. 5, Oct. 1989, pp.1433-1440.
5. F. Forti et al., "Measurement of MOS Current Mismatch in the Weak Inversion Region", IEEE J. Sol. St. Circ, vol. 29, NO. 2, Feb. 1994, pp.138-142.
6. J. Bastos et al, "Mismatch characterization of small size MOS transistors", Proc IEEE Int. Conf on Microelectronic Test Structures, Vol. 8, Mar. 1995, pp.271-276.
7. H. Elzinga, "On the impact of spatial parametric variations on MOS transistors mismatch", Proc IEEE Int. Conf. on Microelectronic Test Structures, Mar. 1996, pp. 173-177.