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Volumn , Issue , 1996, Pages 173-177
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On the impact of spatial parametric variations on MOS transistor mismatch
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Author keywords
[No Author keywords available]
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Indexed keywords
ELECTRIC VARIABLES MEASUREMENT;
RANDOM PROCESSES;
SEMICONDUCTOR DEVICE MANUFACTURE;
SEMICONDUCTOR DEVICE MODELS;
SEMICONDUCTOR DEVICE STRUCTURES;
SEMICONDUCTOR MATERIALS;
COMMON CENTROID LAYOUTS;
MISMATCH LAW;
MOS TRANSISTOR MISMATCH;
NON RANDOM PARAMETER DISTRIBUTIONS;
SPATIAL PARAMETRIC VARIATIONS;
TEST STRUCTURE;
MOSFET DEVICES;
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EID: 0029712766
PISSN: None
EISSN: None
Source Type: Conference Proceeding
DOI: None Document Type: Conference Paper |
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Times cited : (15)
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References (7)
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