Parallel and mixed hardware implementation of artificial neuron network on the FPGA platform

International Journal of Engineering and Technology

Volumn 6, Issue 5, 2014, Pages 2008-2016

  Atibi, Mohamed ^a   Atouf, Issam ^a   Boussaa, Mohamed ^a   Bennis, Abdellatif ^a  

^a HASSAN II UNIVERSITY   (Morocco)

Author keywords

ANN; Execution time; FPGA; Hardware resource; Module of a formal neuron

Indexed keywords

EID: 84920682966     PISSN: 23198613     EISSN: 09754024     Source Type: Journal    
DOI: None     Document Type: Article

References (13)

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