Contribution of interface traps to valence band electron tunneling in PMOS devices

European Solid-State Device Research Conference

Volumn , Issue , 2000, Pages 292-295

  Pompl, T ^a   Kerber, M ^a   Wurzer, H ^a   Eisele, I ^b  

^a INFINEON TECHNOLOGIES AG   (Germany)

^b BUNDESWEHR UNIVERSITY MUNICH   (Germany)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRON INJECTION; ELECTRON TUNNELING; ELECTRONS; INTERFACES (MATERIALS); SOLID STATE DEVICES; VALENCE BANDS;

BAND TO TRAP TUNNELING; BARRIER HEIGHTS; CONDUCTION BAND ELECTRONS; IV CHARACTERISTICS; REFERENCE ENERGY; VALENCE BAND EDGES; VALENCE-BAND ELECTRON TUNNELING; VALENCE-BAND ELECTRONS;

INTERFACE STATES;

EID: 84907812315     PISSN: 19308876     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ESSDERC.2000.194772     Document Type: Conference Paper

References (5)

1. B. Eitan, A. Kolodny, "Two components of tunneling currents in metaloxide-silicon structures", Appl. Phys. Lett. 43(1), 1983, p. 106.
2. Y. Shi et al., "Polarity Dependent Gate Tunneling Currents in Dual-Gate CMOSFET's", IEEE Trans. on Electron Devices 45(11), 1998, p. 2355.
3. Y. Ando, T. Itoh, "Calculation of transmission tunneling current across arbitrary potential", J. Appl. Phys. 61(4), 1987, p. 1497.
4. T. Hori, Gate Dielectrics and MOS ULSIs, Springer, ISBN 3540631828, 1997.
5. Z. A. Weinberg, M. V. Fischetti, "Investigation of the SiO2-induced substrate current in silicon field-effect transistors" J. Appl. Phys. 57(2), 1985, p. 443.