A novel DRAM technology using dual spacer and mechanically robust capacitor for 0.12μm DRAM and beyond

European Solid-State Device Research Conference

Volumn , Issue , 2001, Pages 127-130

  Lee, Jaegoo ^a   Lee, Jinwoo ^a   Koh, Kwanhyeob ^a   Lee, Kyuhyun ^a   Cho, Changhyun ^a   Jeong, Gitae ^a   Jeong, Hongsik ^a   Chung, Taeyoung ^a   Kim, Kinam ^a  

^a SAMSUNG Electronics   (South Korea)

Author keywords

[No Author keywords available]

Indexed keywords

DRAM TECHNOLOGY; MECHANICALLY ROBUST;

EID: 84907484885     PISSN: 19308876     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ESSDERC.2001.195217     Document Type: Conference Paper

References (4)

1. K. N. Kim, et al., Symp. on VLSI Tech., 2000, pp. 10-11
2. H. S. Jeong, et al., IEDM Tech. Dig., 2000, pp. 353-356
3. K. N. Kim, Microelectronics reliability, 2000, vol. 40, no. 2, pp. 191-206
4. Y. S. Chun, et al., IEDM Tech. Dig.,1998, pp. 351-354