ASPRO-216: A standard-cell Q.D.I. 16-bit RISC asynchronous microprocessor

Proceedings - 4th International Symposium on Advanced Research in Asynchronous Circuits and Systems

Volumn 1998-March, Issue , 1998, Pages 22-31

  Renaudin, M ^a   Vivet, P ^a   Robin, F ^a  

^a ECOLE DES MINES DE NANTES   (France)

Author keywords

[No Author keywords available]

Indexed keywords

APPLICATION PROGRAMS; ASYNCHRONOUS SEQUENTIAL LOGIC;

APPLICATION REQUIREMENTS; ASYNCHRONOUS MICROPROCESSOR; EMBEDDED APPLICATION; HARDWARE AND SOFTWARE; ITS ARCHITECTURE; QUASI DELAY INSENSITIVE; SCALAR PROCESSORS; STANDARD CELL;

INTEGRATED CIRCUIT DESIGN;

EID: 84905382304     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ASYNC.1998.666491     Document Type: Conference Paper

References (13)

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