Simulation of vertical Hall sensor in high-voltage CMOS technology

6th International Conference on Telecommunications in Modern Satellite, Cable and Broadcasting Service, TELSIKS 2003 - Proceedings

Volumn 2, Issue , 2003, Pages 811-814

  Jovanović, Elva ^a   Pantić, Danijela ^a   Pantić, Dragan ^a  

^a NONE

Author keywords

[No Author keywords available]

Indexed keywords

CABLES; CMOS INTEGRATED CIRCUITS; HALL EFFECT TRANSDUCERS; MAGNETIC SENSORS;

CMOS TECHNOLOGY; DEVICE CHARACTERISTICS; DEVICE SIMULATIONS; HIGH-VOLTAGES; REDUCTION METHOD; SENSOR CHARACTERISTICS; SENSOR TECHNOLOGIES; VERTICAL HALL SENSORS;

BROADCASTING;

EID: 84905187641     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/TELSKS.2003.1246346     Document Type: Conference Paper

References (7)

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2. R.S. Popovic, Hall Effect Devices, Adam Higler: Bristol, Philadelphia and New York, 1991.
3. E. Schilling, M. Demierre, C. Schott, R.S. Popovic, "A vertical Hall device in CMOS high-voltage technology," Sensors and Actuators A 97-98, pp. 47-53,2002.
4. E. Jovanovic, D Pantic, D.Pantic, "Simulacija karakteristika vertikalnog Holovog senzora u visokonaponskoj CMOS tehnologiji". Zbomik radova XLVII Konf. za ETRAN, Herceg Novi, 2003
5. 0.8um HV CMOS Process Parameters, Austria Mikro Systeme International AG, Document #9933013, 1999.
6. DIOS-ISE - Users Manual, Release 7.0, Integrated System Engineering AG, Zurich, Switzerland.
7. DESSIS-1SE - Users Manual, Release 7.0, Integrated System Engineering AG, Zurich, Switzerland.