Modeling and analysis of digital linear dropout regulators with adaptive control for high efficiency under wide dynamic range digital loads

Proceedings -Design, Automation and Test in Europe, DATE

Volumn , Issue , 2014, Pages

  Gangopadhyay, Samantak ^a   Lee, Youngtak ^a   Nasir, Saad Bin ^a   Raychowdhury, Arijit ^a  

^a GEORGIA INSTITUTE OF TECHNOLOGY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ADAPTIVE CONTROL SYSTEMS; EFFICIENCY; ELECTRIC CURRENT REGULATORS; VOLTAGE REGULATORS;

ADAPTIVE CONTROL; CONSISTENT PERFORMANCE; DROPOUT REGULATORS; LINEAR REGULATORS; LOW DROPOUT REGULATOR; MODEL AND ANALYSIS; SPATIO-TEMPORAL; WIDE DYNAMIC RANGE;

DIGITAL CIRCUITS;

EID: 84903830386     PISSN: 15301591     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.7873/DATE2014.160     Document Type: Conference Paper

References (4)

1. Y. Okuma, et al., "0.5-V input digital LDO with 98.7% current efficiency and 2.7-uA quiescent current in 65nm CMOS," IEEE Custom Integrated Circuits Conference, pp. 1-4, Sept. 2010.
2. A. Raychowdhury, et al., " fully-digital phase-locked low dropout regulator in 32nm CMOS," roc ding of the VLSI Circuit Symposium, June 2012.
3. A. Raychowdhury et al., " 2.3nJ/Fr m Voic ctivity t ctor for Context-w r Sy t m in 32nm MOS," Proceedings of the Custom Integrated Circuit Conference (CICC), June 2012.
4. K. Astrom, "Adptive Control", Addison Weley Series, 1995