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Volumn , Issue , 2002, Pages

Active compensator to improve transient response delay for future generation of microprocessor

Author keywords

[No Author keywords available]

Indexed keywords

INDUCTANCE;

EID: 84900337637     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICCDCS.2002.1004099     Document Type: Conference Paper
Times cited : (1)

References (9)
  • 1
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    • Intel Pentium 4 Processor/Intel 850 Chipset Platform VRM9.0 DC-DC Converter Design Guidelines
    • Intel Pentium 4 Processor/Intel 850 Chipset Platform VRM9.0 DC-DC Converter Design Guidelines
  • 2
    • 0033325933 scopus 로고    scopus 로고
    • Electrical evaluation of flip-chip package alternatives for next generation microprocessors
    • Aug.
    • J. Drnaucr et. a)., "Electrical Evaluation of Flip-Chip Package Alternatives for Next Generation Microprocessors", IEEE Trans, on Advanced Packaging, vol. 22, pp. 407-415, Aug. 1999
    • (1999) IEEE Trans, on Advanced , vol.22 , pp. 407-415
    • Drnaucr, J.1
  • 3
    • 0033349073 scopus 로고    scopus 로고
    • Modeling of power distribution systems for high-performance microprocessor
    • Aug.
    • D. J. Hcrrcll and B. Beker, "Modeling of Power Distribution Systems for High-Performance Microprocessor", IEEE Trans. on Advanced Packaging, vol. 22, pp. 240-249, Aug. 1999
    • (1999) IEEE Trans. on Advanced Packaging , vol.22 , pp. 240-249
    • Hcrrcll, D.J.1    Beker, B.2
  • 4
    • 85168645409 scopus 로고    scopus 로고
    • Model and analysis for combined package and on-chip power grid simulation
    • Rapalla, Italy
    • R. Panda ct. al., "Model and Analysis for Combined Package and On-Chip power Grid Simulation", ISLPED '00, Rapalla, Italy.
    • ISLPED '00
    • Panda, R.1
  • 5
    • 0035245423 scopus 로고    scopus 로고
    • FDTD and experimental investigation of EMI from stacked-card PCB configurations
    • Feb.
    • D. M. Hockanson, ct. al., "FDTD and Experimental Investigation of EMI from Stacked-Card PCB Configurations", in IEEE Trans, on Electromagnetic Compatibility, vol. '43, pp. I-9, Feb. 2001.
    • (2001) IEEE Trans, on Electromagnetic Compatibility , vol.43 , pp. 1-9
    • Hockanson, D.M.1
  • 7
    • 0035118440 scopus 로고    scopus 로고
    • An on-chip ESD protection Circuit with Low Trigger Voltage in BiCMOS Technology
    • Jan.
    • Z. H. Wang and Chen-Hui Tsay, "An on-chip ESD protection Circuit with Low Trigger Voltage in BiCMOS Technology", IEEE Journal of Solid-Statc Circuits, vol. 36, pp. 40-45, Jan. 2001
    • (2001) IEEE Journal of Solid-Statc Circuits , vol.36 , pp. 40-45
    • Wang, Z.H.1    Tsay, C.-H.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.