Normally-off computing with crystalline InGaZnO-based FPGA

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn 57, Issue , 2014, Pages 502-503

  Aoki, Takeshi ^a   Okamoto, Yuki ^a   Nakagawa, Takashi ^a   Ikeda, Masataka ^a   Kozuma, Munehiro ^a   Osada, Takeshi ^a   Kurokawa, Yoshiyuki ^a   Ikeda, Takayuki ^a   Yamade, Naoto ^a   Okazaki, Yutaka ^a   Miyairi, Hidekazu ^a   Fujita, Masahiro ^b   Koyama, Jun ^a   Yamazaki, Shunpei ^a  

^a SEMICONDUCTOR ENERGY LABORATORY CO LTD   (Japan)

^b UNIVERSITY OF TOKYO   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

MRAM DEVICES; RANDOM ACCESS STORAGE;

BOOSTING EFFECTS; CONFIGURATION MEMORY; LOW POWER; NON-VOLATILE; NORMALLY OFF; OPERATION SPEED; ROUTING SWITCHES;

FIELD PROGRAMMABLE GATE ARRAYS (FPGA);

EID: 84898079181     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISSCC.2014.6757531     Document Type: Conference Paper

References (5)

1. S. Yamazaki, et al., "Research, Development, and Application of Crystalline Oxide Semiconductor," Proc. SID, pp. 183-186, Jun. 2012.
2. Y. Okamoto, et al., "Novel Application of Crystalline Indium-Gallium-Zinc-Oxide Technology to LSI: Dynamically Reconfigurable Programmable Logic Device Based on Multi-Context Architecture," ECS Transactions, vol. 54, no. 1, pp. 141-149, Jun. 2013.
3. D. Suzuki, et al., "Design of a Process-Variation-Aware Nonvolatile MTJBased Lookup-Table Circuit," SSDM, pp. 1146-1147, Sep. 2010.
4. Y. Y. Liauw, et al., "Nonvolatile 3D-FPGA With Monolithically Stacked RRAMBased Configuration Memory," ISSCC Dig. Tech. Papers, pp. 406-407, Feb. 2012.
5. M. Kozuma, et al., "Crystalline In-Ga-Zn-O FET-based Configuration Memory for Multi-Context Field-Programmable Gate Array Realizing Fine-Grained Power Gating," SSDM, pp. 1096-1097, Sep. 2013.