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Volumn 3, Issue , 2003, Pages 1349-1352
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Bias circuit topologies for minimization of RF amplifier memory effects
a a a |
Author keywords
[No Author keywords available]
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Indexed keywords
BANDWIDTH;
ELECTRIC NETWORK TOPOLOGY;
FREQUENCY RESPONSE;
CIRCUIT TECHNIQUES;
DECOUPLING CAPACITOR;
INSTANTANEOUS BANDWIDTH;
MEMORY EFFECTS;
PREDISTORTION TECHNIQUES;
SERIES RESONANCE;
TRANSMISSION ZEROS;
WIDEBAND APPLICATIONS;
AMPLIFIERS (ELECTRONIC);
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EID: 84897514291
PISSN: None
EISSN: None
Source Type: Conference Proceeding
DOI: 10.1109/EUMC.2003.177737 Document Type: Conference Paper |
Times cited : (9)
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References (2)
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