A 1-V 5.2-GHz 27.5-mW fully-integrated CMOS WLAN synthesizer

European Solid-State Circuits Conference

Volumn , Issue , 2003, Pages 113-116

  Leung, Gerry C T ^a   Luong, Howard C ^a  

^a HONG KONG UNIVERSITY OF SCIENCE AND TECHNOLOGY   (Hong Kong)

Author keywords

[No Author keywords available]

Indexed keywords

802.11A; CORE AREA; FREQUENCY OFFSETS; LOW POWER; NOVEL DESIGN; PROGRAMMABLE FREQUENCY DIVIDER; SPURIOUS TONES; STANDARD CMOS TECHNOLOGY;

FREQUENCY ALLOCATION;

CMOS INTEGRATED CIRCUITS;

EID: 84893783928     PISSN: 19308833     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ESSCIRC.2003.1257085     Document Type: Conference Paper

References (9)

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2. P. Zhang, et al., "A Direct Conversion CMOS Transceiver for IEEE 802. 1 1 a WLANs", ISSCC Digest of Technical Paper, pp. 354-355, Feb. 2003.
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9. K. T. Kan, C. T. Leung and H. C. Luong, "A 2 V 1. 8 GHz fully integrated CMOS dual-loop frequency synthesizer" IEEE Journal of Solid-state Circuits, Vol. 37, pp. 890-897, July 1996. pp. 1012-1020, Aug. 2002.