Bond pad and ESD protection structure for 0.25μm/0.18μm RF-CMOS

European Solid-State Circuits Conference

Volumn , Issue , 2003, Pages 569-572

  Leenaerts, Domine ^a   Velghe, Rudolf ^a  

^a PHILIPS RESEARCH LABORATORIES   (Netherlands)

Author keywords

[No Author keywords available]

Indexed keywords

AREA REQUIREMENT; BOND PAD; CMOS TECHNOLOGY; ESD PERFORMANCE; ESD PROTECTION; PARASITIC CAPACITANCE; QUALITY FACTORS; RF PERFORMANCE;

CMOS INTEGRATED CIRCUITS; ELECTROSTATIC DISCHARGE;

ELECTROSTATIC DEVICES;

EID: 84893725977     PISSN: 19308833     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ESSCIRC.2003.1257199     Document Type: Conference Paper

References (8)

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2. A. A. Abidi, 'Radio-frequency integrated circuits for portable communications", Proceedings of the IEEE Custom Integrated Circuits Conference, 1994, pp. 151-158
3. S. Voldman, "RF On-Chip ESD Protection Network Physics and Design", EOS/ESD Symposium Proceedings 2000, tutorial
4. EIA/JEDEC STANDARD, Electrostatic Discharge (ESD) Sensitivity Human Body Model (HBM), EIA/JEDEC-A114-A, 1997
5. R. Velghe, et al., 'Diode Network Used as ESD Protection in RF Applications', ESD/EOS Symposium proceedings, pp. 337-345, 2001
6. T. Maloney, et al., 'Transmission Line Pulsing Techniques for Circuit Modelling of ESD Phenomena', EOS/ESD Symposium Proceedings 1985, pp. 49-54
7. G. Notermans, P. de Jong, F. Kuper, 'Pitfalls when correlating TLP, HBM, and MM Testing', ESD/EOS Symposium proceedings, pp. 170-176, 1998
8. T. Smedes et al., "The impact of substrate resistivity on ESD protection devices, " ESD/EOS Symposium proceedings, pp. 354-361, 2002