Blocking in a system on a chip

IEEE Spectrum

Volumn 33, Issue 11, 1996, Pages 35-41

  Hunt, Merill ^a   Rowson, James A ^a  

^a CADENCE DESIGN SYSTEMS   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER HARDWARE; COMPUTER SIMULATION; COMPUTER SOFTWARE; ELECTRONICS PACKAGING; INTEGRATED CIRCUIT LAYOUT; INTERFACES (COMPUTER); SEMICONDUCTOR DEVICE TESTING;

REGISTER TRANSFER LEVEL (RTL) DESCRIPTION; REUSABLE BLOCKS; SYSTEM ON A CHIP; VIRTUAL SOCKET INTERFACE (VSI);

DIGITAL INTEGRATED CIRCUITS;

EID: 0030283179     PISSN: 00189235     EISSN: None     Source Type: Journal    
DOI: 10.1109/6.542273     Document Type: Article

References (3)

1. W.-T. Chang A. Kalavade E. A. Lee Effective Heterogeneous Design and Cosimulation NATO Advanced Study Institute Workshop on Hardware/Software Codesign NATO Advanced Study Institute Workshop on Hardware/Software Codesign Lake Como Italy 1995-June-18-30
2. S. S. Battachuryya P. K. Murthy E. A. Lee Software Synthesis from Dataflow Graphs 1996 Kluwer Academic Publishers Mass., Norwell