On programmable memory built-in self test architectures

Proceedings -Design, Automation and Test in Europe, DATE

Volumn , Issue , 1999, Pages 708-713

  Zarrineh, Kamran ^a   Upadhyaya, Shambhu J ^a  

^a UNIVERSITY AT BUFFALO   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

DIFFERENT STAGES; EXISTING ARCHITECTURES; MEMORY BIST; MEMORY TESTS; PROGRAMMABLE MEMORY; SELF TEST; TEST LOGIC;

BUILT-IN SELF TEST; EXHIBITIONS;

DESIGN;

EID: 84893585846     PISSN: 15301591     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DATE.1999.761207     Document Type: Conference Paper

References (10)

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10. A. van de Goor. Testing Semiconductor Memories: The-ory and Practice. John Wiley and Sons, U.S.A, 1991.