Testing of 3D Circuits

Handbook of 3D Integration: Technology and Applications of 3D Integrated Circuits

Volumn 2, Issue , 2008, Pages 623-633

  Mak, T M ^a  

^a INTEL CORPORATION   (United States)

Author keywords

Bond pads; Defects; Fault tolerant; Wafer probing; Yield

Indexed keywords

EID: 84891317866     PISSN: None     EISSN: None     Source Type: Book    
DOI: 10.1002/9783527623051.ch32     Document Type: Chapter

References (12)

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9. Spainhower, L., Isenberg, J., Chillarege, R. and Berding, J. (8-10 July 1992) Twenty-Second International Symposium on Fault-Tolerant Computing, 1992. FTCS-22. Digest of Papers. pp. 38-47.
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