Ultralow-voltage operation of Silicon-on-Thin-BOX (SOTB) 2Mbit SRAM down to 0.37 v utilizing adaptive back bias

IEEE Symposium on VLSI Circuits, Digest of Technical Papers

Volumn , Issue , 2013, Pages

  Yamamoto, Y ^a   Makiyama, H ^a   Shinohara, H ^a   Iwamatsu, T ^a   Oda, H ^a   Kamohara, S ^a   Sugii, N ^a   Yamaguchi, Y ^a   Mizutani, T ^b   Hiramoto, T ^b  

^a Low power Electronics Association and Project LEAP   (Japan)

^b UNIVERSITY OF TOKYO   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

6T-SRAM; ACCESS TIME; BACK BIAS; OPERATION VOLTAGE; STAND-BY LEAKAGE; ULTRA-LOW-VOLTAGE;

VLSI CIRCUITS;

SILICON;

EID: 84883768687     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

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