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Volumn 1300 LNCS, Issue , 1997, Pages 1074-1078

Treegion scheduling for highly parallel processors

Author keywords

[No Author keywords available]

Indexed keywords

DECISION TREES; FORESTRY; SCHEDULING;

EID: 84882633563     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/bfb0002855     Document Type: Conference Paper
Times cited : (11)

References (11)
  • 1
    • 0014866421 scopus 로고
    • Detection and parallel execution of independent instructions
    • Oct.
    • G. S. Tjaden and M. J. Flynn, "Detection and parallel execution of independent instructions," IEEE Trans. Comprit, Vol. C-19, pp. 889-895, Oct. 1970.
    • (1970) IEEE Trans. Comprit , vol.C-19 , pp. 889-895
    • Tjaden, G.S.1    Flynn, M.J.2
  • 2
    • 0019596071 scopus 로고
    • Trace scheduling: A technique for global microcode compaction
    • July
    • J. A. Fisher, "Trace scheduling: A technique for global microcode compaction," IEEE Trans. CompuL, Vol. C-30, no. 7, pp. 478-490, July 1981.
    • (1981) IEEE Trans. CompuL , vol.C-30 , Issue.7 , pp. 478-490
    • Fisher, J.A.1
  • 3
    • 0010552030 scopus 로고    scopus 로고
    • PhD thesis, Department of Electrical and Computer Engineering, University of Illinois at Urbana-Champaign, Urbana, IL
    • S. A. Mahlke, Exploiting instruction level parallelism in the presence of branches. PhD thesis, Department of Electrical and Computer Engineering, University of Illinois at Urbana-Champaign, Urbana, IL, 1996.
    • (1996) Exploiting Instruction Level Parallelism in the Presence of Branches
    • Mahlke, S.A.1
  • 5
    • 0029516678 scopus 로고
    • Dynamic rescheduling: A technique for object code compatibility in VLIW architectures
    • (Ann Arbor, MI), Nov.
    • T. M. Conte and S. W. Sathaye, "Dynamic rescheduling: A technique for object code compatibility in VLIW architectures," in Proc. 28th Ann. Int'l Symp. on Microarchitecture, (Ann Arbor, MI), Nov. 1995.
    • (1995) Proc. 28th Ann. Int'l Symp. on Microarchitecture
    • Conte, T.M.1    Sathaye, S.W.2
  • 8
    • 0010833094 scopus 로고
    • Percolation scheduling: A parallel compilation technique
    • Cornell University, Ithaca, NY, May
    • A. Nicolau, "Percolation scheduling: a parallel compilation technique," Technical report TR-678, Department of Computer Science, Cornell University, Ithaca, NY, May 1985.
    • (1985) Technical Report TR-678, Department of Computer Science
    • Nicolau, A.1
  • 9
    • 0002639275 scopus 로고
    • Some design ideas for a VLIW architecture for sequential-natured software
    • (Pisa, Italy) North Holland (published as Parallel Processing, M. Cosnard, et al., (eds).)
    • K. Ebcioglu, "Some design ideas for a VLIW architecture for sequential-natured software," in Proceedings of the IFIP Working Group 10.3 Working Conference on Parallel Processing, (Pisa, Italy), pp. 3-21, North Holland, 1988. (published as Parallel Processing, M. Cosnard, et al., (eds).).
    • (1988) Proceedings of the IFIP Working Group 10.3 Working Conference on Parallel Processing , pp. 3-21
    • Ebcioglu, K.1
  • 10
    • 0038658051 scopus 로고
    • Global code generation for instruction-level parallelism: Trace scheduling-2
    • June
    • J. A. Fisher, "Global code generation for instruction-level parallelism: Trace Scheduling-2," Tech. Rep. HPL-93-43, Hewlett-Packard Laboratories, June 1993.
    • (1993) Tech. Rep. HPL-93-43, Hewlett-Packard Laboratories
    • Fisher, J.A.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.