Profile-driven instruction level parallel scheduling with application to super blocks

Proceedings of the Annual International Symposium on Microarchitecture

Volumn , Issue , 1996, Pages 58-67

  Chekuri, C ^a   Johnson, R ^a   Motwani, R ^a   Natarajan, B ^a   Rau, B R ^a   Schlansker, M ^a  

^a STANFORD UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; COMPUTATIONAL COMPLEXITY; ENCODING (SYMBOLS); HEURISTIC PROGRAMMING; OPTIMIZATION;

INSTRUCTION LEVEL PARALLELISM (ILP); PROFILE DRIVEN INSTRUCTION LEVEL PARALLEL SCHEDULING;

PROGRAM COMPILERS;

EID: 0030411517     PISSN: 10724451     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (18)