A novel grid synchronization PLL method based on adaptive low-pass notch filter for grid-connected PCS

IEEE Transactions on Industrial Electronics

Volumn 61, Issue 1, 2014, Pages 292-301

  Lee, Kyoung Jun ^a,b   Lee, Jong Pil ^b   Shin, Dongsul ^a,b   Yoo, Dong Wook ^b   Kim, Hee Je ^a  

^a Pusan National University   (South Korea)

^b Korea Electrotechnology Research Institute (KERI)   (South Korea)

Author keywords

Digital signal processor (DSP); Distributed energy resources (DERs); Grid code; Low pass notch (LPN) filter; Phase locked loop (PLL)

Indexed keywords

ELECTRIC INVERTERS; ENERGY RESOURCES; FAST FOURIER TRANSFORMS; NOTCH FILTERS; PHASE LOCKED LOOPS; SIGNAL PROCESSING;

DIGITAL SIGNAL PROCESSORS (DSP); DISTRIBUTED ENERGY RESOURCES; GRID CODES; LOW-PASS; PHASE LOCKED LOOP (PLL);

LOW PASS FILTERS;

EID: 84880888805     PISSN: 02780046     EISSN: None     Source Type: Journal    
DOI: 10.1109/TIE.2013.2245622     Document Type: Article

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