Energy-aware I/O optimization for checkpoint and restart on a NAND flash memory system

FTXS 2013 - Proceedings of the 3rd ACM Workshop on Fault-Tolerance for HPC at eXtreme Scale

Volumn , Issue , 2013, Pages 41-47

  Saito, Takafumi ^a,b   Sato, Kento ^a   Sato, Hitoshi ^a,b   Matsuoka, Satoshi ^a,b,c  

^a TOKYO INSTITUTE OF TECHNOLOGY   (Japan)

^b JAPAN SCIENCE AND TECHNOLOGY AGENCY   (Japan)

^c NATIONAL INSTITUTE OF INFORMATICS   (Japan)

Author keywords

checkpoint restart; low energy technique; NAND flash memory

Indexed keywords

APPLICATION EXECUTION; CHECKPOINT-AND-RESTART; CHECKPOINT/RESTART; ENERGY-AWARE OPTIMIZATIONS; HIGH-PERFORMANCE COMPUTING; LOW ENERGY TECHNIQUE; NAND FLASH MEMORY; OPTIMIZATION TECHNIQUES;

ENERGY EFFICIENCY; ENERGY UTILIZATION; FAULT TOLERANCE; MARKOV PROCESSES; OPTIMIZATION; VIRTUAL STORAGE;

NAND CIRCUITS;

EID: 84880052335     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/2465813.2465822     Document Type: Conference Paper

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