High-performance bidiagonal reduction using tile algorithms on homogeneous multicore architectures

ACM Transactions on Mathematical Software

Volumn 39, Issue 3, 2013, Pages

  Ltaief, Hatem ^a   Luszczek, Piotr ^b   Dongarra, Jack ^b,c,d  

^a KING ABDULLAH UNIVERSITY OF SCIENCE AND TECHNOLOGY   (Saudi Arabia)

^b University of Tennessee   (United States)

^c OAK RIDGE NATIONAL LABORATORY   (United States)

^d UNIVERSITY OF MANCHESTER   (United Kingdom)

Author keywords

Bidiagional reduction; Bulge chasing; Data translation layer; Dynamic scheduling; High performance kernels; Tile algorithms; Two stage approach

Indexed keywords

BANDWIDTH; CACHE MEMORY; COMPUTATIONAL EFFICIENCY; MEMORY ARCHITECTURE; OPEN SOURCE SOFTWARE; OPEN SYSTEMS; SINGULAR VALUE DECOMPOSITION; SOFTWARE ARCHITECTURE;

BULGE CHASING; DATA TRANSLATIONS; DYNAMIC SCHEDULING; HIGH PERFORMANCE KERNELS; TWO STAGE APPROACH;

DATA REDUCTION;

EID: 84877905452     PISSN: 00983500     EISSN: 15577295     Source Type: Journal    
DOI: 10.1145/2450153.2450154     Document Type: Article

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