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Volumn 2003-January, Issue , 2003, Pages 249-252
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Impulse immunity test method for digital integrated circuits
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Author keywords
Circuit testing; Clocks; Degradation; Digital integrated circuits; Electrostatic discharge; IEC standards; Immune system; Immunity testing; Impulse testing; Integrated circuit testing
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Indexed keywords
CLOCKS;
DEGRADATION;
ELECTRIC DISCHARGES;
ELECTROMAGNETIC PULSE;
ELECTROMAGNETIC WAVE INTERFERENCE;
ELECTROSTATIC DEVICES;
ELECTROSTATIC DISCHARGE;
IMMUNE SYSTEM;
IMPULSE TESTING;
INTEGRATED CIRCUIT TESTING;
INTEGRATED CIRCUITS;
SIGNAL INTERFERENCE;
STANDARDS;
CIRCUIT TESTING;
IEC STANDARDS;
IMMUNITY TEST;
IMMUNITY TESTING;
TEST METHOD;
DIGITAL INTEGRATED CIRCUITS;
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EID: 84876928272
PISSN: None
EISSN: None
Source Type: Conference Proceeding
DOI: 10.1109/ICEMIC.2003.238030 Document Type: Conference Paper |
Times cited : (2)
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References (8)
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