Demonstration of scaled Ge p-channel FinFETs integrated on Si

Technical Digest - International Electron Devices Meeting, IEDM

Volumn , Issue , 2012, Pages

  Van Dal, M J H ^a   Vellianitis, G ^a   Doornbos, G ^a   Duriez, B ^a   Shen, T M ^b   Wu, C C ^b   Oxland, R ^a   Bhuwalka, K ^a   Holland, M ^a   Lee, T L ^b   Wann, C ^b   Hsieh, C H ^b   Lee, B H ^b   Yin, K M ^b   Wu, Z Q ^b   Passlack, M ^a   Diaz, C H ^b  

^a TSMC   (Belgium)

^b TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY   (Taiwan)

Author keywords

[No Author keywords available]

Indexed keywords

BULK FINFET; FINFET DEVICES; FINFETS; P CHANNELS; SUBTHRESHOLD CHARACTERISTICS; SUBTHRESHOLD SWING;

ASPECT RATIO; ELECTRON DEVICES; INTEGRATED CIRCUITS; MOSFET DEVICES; SILICON;

GERMANIUM;

EID: 84876117463     PISSN: 01631918     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IEDM.2012.6479089     Document Type: Conference Paper

References (17)

1. J.-S. Park et al., Appl. Phys. Lett. 90 052113 (2007).
2. http://newsroom.intel.com.
3. C.-C. Yeh et al., IEDM Tech. Dig., p.34.1.1 (2010).
4. C.C. Wu et al., IEDM Tech. Dig., p.27.1.1 (2010).
5. M. Heyns et al., IEDM Tech. Dig., p. 13.1.1 (2011).
6. J. Mitard et al., IEDM Tech. Dig., p.873 (2008).
7. B. De Jaeger et al., in Proc. 37th ESSDERC, p.462 (2007).
8. J. Mitard et al., VLSI Symp. Proc., pp. 82 (2009).
9. R. Pillarisetty et al., IEDM Tech. Dig., p. 6.7.1 (2010).
10. G. Nicholas et al. IEEE Trans. Electron Devices 28 p.825 (2007).
11. B. Liu et al., IEEE Silicon Nanoelectronic Workshop paper 3-2 (2012).
12. S.-H. Hsu et al., IEDM Tech. Dig., p. 35.2.1 (2011).
13. J. Xiang et al., Nature 441, p. 489 (2006).
14. L. Zhang et al., Nano Lett. 6 p.2785 (2006).
15. J.W. Peng et al., IEDM Tech. Dig., p. 38.2.1 (2009).
16. G. Eneman et al., IEEE Trans. Electron Devices 55 p. 2287 (2008).
17. E. Simoen et al., IEEE Electron Device Lett. 30 p. 562 (2009).