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Volumn , Issue , 2012, Pages 456-460

Feasibility study: Inkjet filling of Through Silicon Vias (TSV)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRICAL ISOLATION; FEASIBILITY STUDIES; MICRO-ELECTRONIC DEVICES; MULTIPLE STRUCTURES; PIEZOELECTRIC INK JETS; PROCESSING TECHNIQUE; SCANNING ELECTRON MICROSCOPE; THROUGH SILICON VIAS;

EID: 84875707121     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper
Times cited : (11)

References (6)
  • 1
    • 0034821485 scopus 로고    scopus 로고
    • Development of Advanced 3D Chip Stacking Technology with Ultra-Fine Interconnection
    • Kenji Takahashi et al., Development of Advanced 3D Chip Stacking Technology with Ultra-Fine Interconnection, Electronic Components and Technology Conference, pg. 541-546. (2001).
    • (2001) Electronic Components and Technology Conference , pp. 541-546
    • Takahashi, K.1
  • 2
    • 51349164996 scopus 로고    scopus 로고
    • Development of 3D Silicon Module with TSV for System in Packaging
    • Navas Khan et al., Development of 3D Silicon Module with TSV for System in Packaging, Electronic Components and Technology Conference, pg. 550-555. (2008).
    • (2008) Electronic Components and Technology Conference , pp. 550-555
    • Khan, N.1
  • 3
    • 84903995150 scopus 로고    scopus 로고
    • Preparation of Silver Nanoparticle with Different Particle Sizes for Low-Temperature Sintering
    • Steve Lien-Chung Hsu, Rong-Tarng Wu, Preparation of Silver Nanoparticle with Different Particle Sizes for Low-Temperature Sintering, 2010 International Conference on Nanotechnology and Biosensors, pg. 55-58. (2010).
    • (2010) 2010 International Conference on Nanotechnology and Biosensors , pp. 55-58
    • Hsu, S.L.-C.1    Wu, R.-T.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.